Introduction to 100G Ethernet Technologies and Applications

The basic requirement of promoting Ethernet interface rate to 100Gbit is bandwidth increasing, the most important factor is the bandwidth intensive application of video, and the telecom application of Ethernet also leads to the increase of convergence bandwidth demand. Each level of the network from Ethernet user access, enterprise to the backbone is approaching its current speed limit.

The prerequisite for promoting 100G Ethernet applications is the formulation of relevant standards. The 100Gbit Ethernet interface corresponds to the standard ieee802.3b, currently in draft phase 2.1, the standard has identified a variety of interface media, rate, and physical coding child layer (PCS), media access control (MAC) layer architecture definition. The standards ceased all technical changes after the July 2009 meeting, and the November 2009 standard meeting will produce draft 3.0, which is expected to be released before June 2010. In addition, the 100GE-related standard organization also includes the International Telecommunication Union Remote Communication Standard Group (ITU-T) and the Optical Interconnection Forum (OIF), whose focus is different, ITU-T mainly developed 100G transmission Optical Conversion Unit (OTU) frame structure and coding, fault-tolerant technology OIF mainly studies the physical layer high Speed Channel specification, the definition electrical interface standard.

Ethernet upgrades to 100Gbit interfaces require key technical support, and the maturity and commercialization of key technologies also take time. From the chip, the system, the network all aspects including the standard research also needs the technical breakthrough and the time.

100G Ethernet technologies and standards

Key technologies that support a 100G Ethernet interface include physical layer (PHY) channel aggregation, multi-fiber channeling, and wavelength division multiplexing (WDM). The physical media dependent (PMD) sublayer meets 100 Gbit / s rate bandwidth and the new chip technology supports up to 40 nm process, which provides the possibility of developing next-generation high-speed interfaces. Corresponding to the interface part, the parallel multimode interface of the optical fiber interface PMD needs to solve the problem of high packing density and power consumption. The single-mode 4 × 25 Gbit / s WDM interface has 25 Gbit/s serial-parallel conversion circuit (SERDES) technology and The technology of non-cooling optical devices needs the breakthrough. Corresponding to the system, the high bandwidth brought by the increase of interface rate brings a new threshold for packet processing, storage, system switching and backplane technology. Corresponding to the network, the new interface Transmission problems, not only the need to define a new OTU frame structure, for such ultra-high-speed transmission, the need to solve the electronic circuit under the conditions of signal processing, optical signal modulation, physical coding, dispersion compensation, nonlinear processing, and FE / GE / 10GE Frame structure and PHY sub-layer compatibility and consistency issues, but also need to make 100G transmission characteristics to meet the existing 10G transmission network-related features, or bring network reconstruction will affect the promotion of new technologies.

The next-generation Ethernet technology standard covers both 40 Gbit / s and 100 Gbit / s speeds, addressing different needs in servers and networks. 40 Gbit / s is primarily for computing applications, while 100 Gbit / s is for core and aggregation applications. Offering two speeds, the IEEE intends to ensure that Ethernet addresses the needs of different applications more efficiently and cost-effectively, further driving Ethernet convergence based on Ethernet technology. The standard specifies the Physical Coding Sublayer (PCS), Physical Medium Access (PMA) sublayer, Physical Medium Dependency (PMD) sublayer, Forwarding Error Correction (FEC) modules and the interface bus, MAC, The bus uses XLAUI (40 Gbit / s), CAUI (100 Gbit / s), on-chip bus XLGMII (40 Gbit / s), CGMII (100 Gbit / s).

The standard supports only full-duplex operation and retains 802.3MAC Ethernet frame format. A variety of physical media interface specifications are defined, including a 1 m backplane connectivity (100GE interface without backplane connectivity definition), 7 m copper cable, 100 m parallel multimode fiber and 10 km single mode fiber based on WDM technology, up to 40 km transmission distance is defined at 100 Gbit / s. The standard defines the Multichannel Distribution (MLD) protocol architecture for PCS. The standard also defines the electrical interface specification for inter-chip connections. Four and ten 10.312 5 Gbit / s channels are used for 40 Gbit / s and 100 Gbit / s respectively , Polling mechanism for data distribution to obtain the rate of 40G and 100G, the other through the definition of the virtual channel to solve the problem of adapting to different physical channels or optical wavelengths; clear physical layer coding using 64B / 66B.

Although the standard defines the architecture and interface of 100 Gbit / s Ethernet, there are still many problems to be solved. First of all, PMD is a key part of 802.3ba. The 40G / 100G optical module includes a short wavelength parallel interface, corresponding to 40GBASE-SR4 and 100GBASE-SR10. The main technical difficulty lies in the packaging density. The long wavelength division interface is difficult.  The 25 Gbit / s SERDES and encapsulation technology corresponding to the PMA is a standard and key technology for the 100G WDM optical module uncooled laser technology. The package format is specified by the CFP Multi-Source Agreement (MSA) as CFP; the corresponding copper Cable media-dependent interface (MDI) standards are defined by the SFF-8436 and SFF-8642, and specific structure and pin assignments are defined.

The corresponding chip of the 100G interface has no problem at the MAC layer. The PMA service interface electrical interface specification requires each channel to work at a rate of 10.312 5 Gbit / s, except that the ASIC is used when the standard is mature and pre-field programmable Gate Array (FPGA) implementation of the MAC needs to support the rate of 10.312 5 Gbit / s, only a small number of FPGA companies support . Previous evaluation systems used transitions from 8/20 5.156 25 Gbit / s channels to 4/10 10.312 5 Gbit / s standard interfaces with the addition of SERDES Mux devices.

High-speed Ethernet To really bring practical technological benefits to users, transport network services must be carried on the transport network, not just used in large data centers or small area network. Therefore, in addition to the modulation technology, how high-speed Ethernet is transmitted over the optical transport network and operation and maintenance management (OAM) and other characteristics also determine the key technology of its success. The ITU-T SG15 Q11 Jeju Intermediate Meeting has reached the definition of OTU mapping for 40G / 100G Ethernet interfaces [8]: 40GE is mapped to OPU3 in G.709 and 1024B / 1027B is used for transmission coding; 100GE is mapped to ODU4 / OTU4 with a bit rate of 111.809 973 Gbit / s (= 255/227 × 2.488 320 Gbit / s × 40). The standard maturity is expected to be around 2011/2012. Virtual concatenation technology can be adapted to high-speed services such as 100 Gbit / s Ethernet. However, to improve the utilization of optical fibers, virtual concatenation is not an efficient technique and can only increase the bit rate at each wavelength.

Using serial 100G Dense Wavelength Division Multiplexing (DWDM) transmission technology, 100GE services of 10 × 10GE / 4 × 25GE are adapted to 111.809 973 Gbit / s OTU4 through ODU4. Due to the very high rate of single-wave 100G, higher requirements are imposed on various physical damage tolerances, such as OSNR and PMD, which require the use of special techniques to reduce the transmitted light on the transmitting optical fiber line Signal baud rate to improve damage tolerance. For example, high-order coding modulation techniques such as Quadrature Phase Shift Keying (QPSK), 8-Phase Shift Keying (8PSK), Quadrature Amplitude Modulation (QAM), Orthogonal Frequency Division Multiplexing (OFDM) Combined with polarization multiplexing demultiplexing technology. Since single-wave transmission 100GE has more stringent requirements on PMD and CD, it is likely that coherent reception / electrical processing may be adopted at the receiving end in the future to improve the tolerance to physical damage, Including non-linear effect suppression, PMD, CD compensation, etc., so that single-wave 100GE can be mixed in 10G / 40G network transmission, smooth upgrade.

In the long run, 100GE DWDM transmission will adopt a combination solution of polarization multiplexing, high order coding modulation, coherent reception/processing, and super FEC to smoothly upgrade 40G optical networks to 100G systems. Since 100G transmission needs the support of high-speed optoelectronic devices, it is estimated that these high-speed optoelectronic devices will become mature in 2012.

100G Ethernet applications

The development of 100 Gbit / s Ethernet standards and technologies is driven by demand but ahead of schedule, according to the plan of the IEEE802.3ba Task Force (TF) it is expected that standards will be finalized soon, but the real business time Depends on more factors.

First of all, under the premise of standard maturity, it also needs real network demand-driven and is in the interest of operators. The main factors of bandwidth demand include: The increasing business is based on IP, as it is now described by ALL IP; almost all the IP packets sent from the source to sink the whole process is encapsulated in the Ethernet frame; time-division complex The technology used in Ethernet over TDM over Ethernet has matured and traditional voice compatibility is no longer a problem; Ethernet encapsulation is simpler and cheaper than SONET / SDH encapsulation. These decisions to upgrade the Ethernet interface to 100 Gbit / s are both objective and urgent. Network communications can be achieved on 100 Gbit / s Ethernet networks with “accelerated network communications and improved application performance”, enabling fast access to data stored in data Center of the various applications, implementation of bandwidth management, cache, compression, path optimization and protocol acceleration and other functions. For the application at the convergence layer, the downlink port is switching to 10 Gbit / s and the uplink can only use 10 Gbit / s port link aggregation. For a 100 Gbit / s Ethernet interface, you can improve the management, distribution, and efficiency of data flow. For the data center, with the increase of 10 Gbit / s interface, there is also the demand for upstream and inter-connected high-speed interfaces. For the efficient transmission of backbone networks, 100G high- Interface and transmission maturity.

The P802.3ba standard has fully considered the maturity of related standards and technologies of the electrical interface when adopting the 10.3125 Gbit / s inter-chip interconnection transmission channel. The multimode parallel optical interface can support the OM3 optical fiber to meet the requirements of 100 m Even over longer distances; single-mode 40GBASE-LR4 is economical with coarse wavelength division multiplexing (CWDM); 100GBASE-LR4 uses DWDM with 25.78125 Gbit / s per wavelength and 1295-1310 nm wavelength, Fully use the original fiber, integrated technology and cost, the standard selection of technologies are practical and feasible, to help promote the 100G interface in the local and metropolitan area within the commercial.

For the whole network of users, serial 100GE transmission standard and technology before maturity can use the reverse multiplexing technology. 100GE services of 10 × 10GE or 4 × 25GE interfaces are adapted to OTU2 / OTU3 through ODU2 / ODU3 and transmitted through multiple wavelengths in 10G / 40G optical networks. It is possible to eliminate the need to redesign and modify existing 10G / 40G DWDM optical networks. The transmission pattern is still ODB / DRZ / EPR – Differential Quadrature Phase Shift Keying Control (eRZ-DQPSK). This model can be used 10G / 40G existing mature optoelectronic devices, and the entire system performance and 10G / 40G system consistent. This scheme can realize the smooth network upgrade, meet the operator’s cost expectation, and the device is ripe [10].

Therefore, considering the current cost and demand, the commercial implementation of 100 Gbit / s Ethernet in the metropolitan area network is a more feasible solution because a large amount of data needs to be on and off the metropolitan area network at any time without any compensation Device transmission system will greatly simplify the network design, 100 Gbit / s Ethernet just to meet this demand, while high bandwidth to meet the metropolitan area network 40% annual traffic growth. In a word, the development demand of 100 Gbit / s Ethernet has already been obvious, and the cost advantage will also be strengthened constantly. However, the transmission of 100 Gbit / s Ethernet transmission needs constant technical improvement from modulation mode to operation management and maintenance. The real large-scale commercial Take time.

In addition to this technology upgrade, in addition to 100 Gbit / s Ethernet, other protocols, including Fibre Channel, Infiniband, and SONET, will also be available in 40/100 Gbit / s networks. In the late 1990s, Ethernet ports Equipment prices have dropped more than twice as fast as competitive ATM and Fiber Distributed Data Interface (FDDI). However, 40 Gbit / s and faster networks share many of the same FPGAs, SERDES, and encoding technologies, making it difficult for any device to achieve cost advantage by mass production. 100 Gbit / s Ethernet may not be as dominant as it used to be.

Conclusion

Through the introduction of 100 Gbit / s Ethernet technology and difficult analysis of key technologies and system design as well as the discussion of 100GE transmission network, 100 Gbit / s Ethernet technology is very viable, everyone is enthusiastic to participate, but the standard and technology itself also have to be mature, commercial pilot will start in late 2009, but mature commercial is expected to be after 2012. In addition to the technical and commercial challenges, the opportunities presented are enormous, starting with the opportunity for research institutes to discover and innovate; bringing new, high-return markets to component and module suppliers (but also Requires high investment); For system suppliers, can take this opportunity to lead the market.